Experimental results and modeling techniques for substrate noise in mixed-signal integrated circuits

DK Su, MJ Loinaz, S Masui… - IEICE transactions on …, 1993 - search.ieice.org
Switching transients in digital MOS circuits can perturb analog circuits integrated on the
same die by means of coupling through the substrate. This paper describes an experimental …

An IC for linearizing RF power amplifiers using envelope elimination and restoration

DK Su, WJ McFarland - IEEE Journal of Solid-State Circuits, 1998 - ieeexplore.ieee.org
This paper presents a monolithic CMOS implementation of an envelope elimination and
restoration linearization system that improves the linearity of efficient radio-frequency power …

A single-chip dual-band tri-mode CMOS transceiver for IEEE 802.11 a/b/g wireless LAN

…, SS Mehta, S Mendis, K Onodera… - IEEE Journal of Solid …, 2004 - ieeexplore.ieee.org
A single-chip dual-band tri-mode CMOS transceiver that implements the RF and analog front-end
for an IEEE 802.11a/b/g wireless LAN is described. The chip is implemented in a 0.25-/…

A digitally modulated polar CMOS power amplifier with a 20-MHz channel bandwidth

A Kavousian, DK Su, M Hekmat… - IEEE Journal of Solid …, 2008 - ieeexplore.ieee.org
This paper presents a CMOS RF power amplifier that employs a digital polar architecture to
improve the overall power efficiency when amplifying signals with high linearity requirements…

A CMOS RF power amplifier with parallel amplification for efficient power control

A Shirvani, DK Su, BA Wooley - IEEE Journal of Solid-State …, 2002 - ieeexplore.ieee.org
This paper introduces a CMOS radio-frequency (RF) power amplifier that uses parallel
amplification to provide high efficiency over a broad range of output power. Three binary-…

A 5-GHz CMOS transceiver for IEEE 802.11 a wireless LAN systems

M Zargari, DK Su, CP Yue, S Rabii… - IEEE Journal of Solid …, 2002 - ieeexplore.ieee.org
A 5-GHz transceiver comprising the RF and analog circuits of an IEEE 802.11a-compliant
WLAN has been integrated in a 0.25-/spl mu/m CMOS technology. The IC has 22-dBm …

A 0.7-V 870-W Digital-Audio CMOS Sigma-Delta Modulator

H Park, KY Nam, DK Su, K Vleugels… - IEEE Journal of Solid …, 2009 - ieeexplore.ieee.org
This paper introduces a power-efficient, chopper-stabilized switched-capacitor sigma-delta (SigmaDelta)
modulator that combines delayed input feedforward and single-comparator …

A low-voltage low-power sigma-delta modulator for broadband analog-to-digital conversion

KY Nam, SM Lee, DK Su… - IEEE Journal of Solid …, 2005 - ieeexplore.ieee.org
A cascade of sigma-delta modulator stages that employ a feedforward architecture to reduce
the signal ranges required at the integrator inputs and outputs has been used to implement …

A CMOS oversampling D/A converter with a current-mode semidigital reconstruction filter

DK Su, BA Wooley - IEEE journal of solid-state circuits, 1993 - ieeexplore.ieee.org
Oversampling digital-to-analog (D/A) converters employing sigma-delta modulation noise
shaping and single-bit quantization are attractive for use in digital audio applications because …

Measuring and modeling the effects of substrate noise on the LNA for a CMOS GPS receiver

M Xu, DK Su, DK Shaeffer, TH Lee… - IEEE Journal of Solid …, 2001 - ieeexplore.ieee.org
The influence of substrate noise coupling on the performance of a low-noise amplifier (LNA)
for a CMOS GPS receiver has been investigated both analytically and experimentally. A …