User profiles for Giacomo Indiveri

Giacomo Indiveri

Institute of Neuroinformatics, University of Zurich and ETH Zurich
Verified email at ini.uzh.ch
Cited by 18057

[HTML][HTML] Neuromorphic silicon neuron circuits

G Indiveri, B Linares-Barranco, TJ Hamilton… - Frontiers in …, 2011 - frontiersin.org
Hardware implementations of spiking neurons can be extremely useful for a large variety of
applications, ranging from high-speed modeling of large-scale neural systems to real-time …

A VLSI array of low-power spiking neurons and bistable synapses with spike-timing dependent plasticity

G Indiveri, E Chicca, R Douglas - IEEE transactions on neural …, 2006 - ieeexplore.ieee.org
We present a mixed-mode analog/digital VLSI device comprising an array of leaky integrate-and-fire
(I&F) neurons, adaptive synapses with spike-timing dependent plasticity, and an …

Memory and information processing in neuromorphic systems

G Indiveri, SC Liu - Proceedings of the IEEE, 2015 - ieeexplore.ieee.org
A striking difference between brain-inspired neuromorphic processors and current von
Neumann processor architectures is the way in which memory and processing is organized. As …

[HTML][HTML] Frontiers in neuromorphic engineering

G Indiveri, TK Horiuchi - Frontiers in neuroscience, 2011 - frontiersin.org
Neurobiological processing systems are remarkable computational devices. They use slow,
stochastic, and inhomogeneous computing elements and yet they outperform today’s most …

[HTML][HTML] A reconfigurable on-line learning spiking neuromorphic processor comprising 256 neurons and 128K synapses

…, F Stefanini, D Sumislawska, G Indiveri - Frontiers in …, 2015 - frontiersin.org
Implementing compact, low-power artificial neural processing systems with real-time on-line
learning abilities is still an open challenge. In this paper we present a full-custom mixed-…

A low-power adaptive integrate-and-fire neuron circuit

G Indiveri - Proceedings of the 2003 International Symposium …, 2003 - ieeexplore.ieee.org
We present a low-power analog circuit for implementing a model of a leaky integrate and fire
neuron. Next to being optimized for low-power consumption, the proposed circuit includes …

[HTML][HTML] STDP and STDP variations with memristors for spiking neuromorphic learning systems

…, T Masquelier, T Prodromakis, G Indiveri… - Frontiers in …, 2013 - frontiersin.org
In this paper we review several ways of realizing asynchronous Spike-Timing-Dependent-Plasticity
(STDP) using memristors as synapses. Our focus is on how to use individual …

[HTML][HTML] 2022 roadmap on neuromorphic computing and engineering

…, A Mizrahi, P Yao, JJ Yang, G Indiveri… - Neuromorphic …, 2022 - iopscience.iop.org
Modern computation based on von Neumann architecture is now a mature cutting-edge
science. In the von Neumann architecture, processing and memory units are implemented as …

Integration of nanoscale memristor synapses in neuromorphic computing architectures

G Indiveri, B Linares-Barranco, R Legenstein… - …, 2013 - iopscience.iop.org
Conventional neuro-computing architectures and artificial neural networks have often been
developed with no or loose connections to neuroscience. As a consequence, they have …

[HTML][HTML] Large-scale neuromorphic spiking array processors: A quest to mimic the brain

…, JL Molin, G Cauwenberghs, G Indiveri… - Frontiers in …, 2018 - frontiersin.org
Neuromorphic engineering (NE) encompasses a diverse range of approaches to information
processing that are inspired by neurobiological systems, and this feature distinguishes …